The inversion is the part I didn't expect: the dense Zen 6c is now the top IPC core (full 4MB L3 per core), and the old classic design is the high-frequency one. They also tried not to leave a software-visible gap, so the same optimizations still apply to both.
agreed.. Full-size L3 plus more generously sized reordering buffers.
I'm curious if there might be a mixed-CCD desktop part in the future; A 12-core frequency-oriented CCD + 32-core dense CCD would be quite a beast. Any workload that can scale to 16+ cores would almost certainly love to have double the cores at a bit less frequency...
I think this would be a much bigger deal if it wasn’t for the ai taking all the air out of the room.
The inversion is the part I didn't expect: the dense Zen 6c is now the top IPC core (full 4MB L3 per core), and the old classic design is the high-frequency one. They also tried not to leave a software-visible gap, so the same optimizations still apply to both.
agreed.. Full-size L3 plus more generously sized reordering buffers.
I'm curious if there might be a mixed-CCD desktop part in the future; A 12-core frequency-oriented CCD + 32-core dense CCD would be quite a beast. Any workload that can scale to 16+ cores would almost certainly love to have double the cores at a bit less frequency...
chasing clocks has a cost.
Interesting article. Very rare to see CPU designers go so in depth.
>> Very rare to see CPU designers go so in depth.
Very rare to see an inteviewer who has tested to that level and can say "gee you increased L2 hit rate by XX how'd you do that?"
Pour one out for Anand and anandtech.com