30 points | by mooreds a day ago ago
7 comments
Short version: "It turned out our chosen base address for the FMC (FPGA Mezzanine Card) bus had a default memory type of Normal Cached."
They accidentally put an external non-memory device behind the cache. That's never going to work right, but might work some of the time.
An amateur embedded systems mistake in my opinion.
Harkens me back to Sun/Sparc hardware and Solaris.
For the uninitiated, Service Processor (SP) is just another kind of Baseboard Management Controller.
well you couldn't have known since the link to the SP is dead in the article, but saying it's a bmc is a bit of a stretch
[1]: https://docs.oxide.computer/guides/architecture/rack-compone...
Bryan's going to have an aneurysm.
I have died.
Short version: "It turned out our chosen base address for the FMC (FPGA Mezzanine Card) bus had a default memory type of Normal Cached."
They accidentally put an external non-memory device behind the cache. That's never going to work right, but might work some of the time.
An amateur embedded systems mistake in my opinion.
Harkens me back to Sun/Sparc hardware and Solaris.
For the uninitiated, Service Processor (SP) is just another kind of Baseboard Management Controller.
well you couldn't have known since the link to the SP is dead in the article, but saying it's a bmc is a bit of a stretch
[1]: https://docs.oxide.computer/guides/architecture/rack-compone...
Bryan's going to have an aneurysm.
I have died.